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Scazon Posted - 25 Jul 2017 : 13:59:24
(1) It doesn't break text, at least on screen.
(2) The mm/ thou toggle button doesn't convert gap value.
6   L A T E S T    R E P L I E S    (Newest First)
Scazon Posted - 27 Jul 2017 : 13:01:01
But as I said, there's no real reason to break the screen at vias.
Iain Wilkie Posted - 27 Jul 2017 : 10:54:41
TBH I think that is the correct way. You don't want to break up text .... a lot of the time on dense boards text has to cover vias etc, so this could make it un-readable.

Iain
edrees Posted - 27 Jul 2017 : 10:47:30
V21 Silk Screen Break.

Silk screen "Designators" don't appear to "break" either (as well as "free" text referred to earlier). So it is only a silk screen component "shape" break feature and not a general "Automatic Breaking of Silkscreen" feature as promoted in V21.
In the (Silk Screen) Layer Types => Edit Layer Type, the switch under "Settings" is called " Break Shapes Around Pads" and not Break All Silkscreen Around Pads, and Text is not a "shape" I suppose!
edrees Posted - 25 Jul 2017 : 15:38:51
System crashes on an old pcb design (Sept. 2009, -not sure what Version was around then?) being updated with the new V21 Silk screen gap feature.

Print=>PDF of Silk screen causes crash when silk screen gap<0.1mm, even though pcb design re-saved in V21.
edrees Posted - 25 Jul 2017 : 14:54:48
V21 Silk Screen Break.
1) I can't get it to break silk screen Text either! Text cannot be changed to a "Shape", -if it could it might work?
2) Gap is always in mm ???
3) I have reduced the "gap" to 0.01 mm to get sensible looking SMD outlines, - I wonder what the registration accuracy of silk screen is for a commercially viable pcb? Even if it is +/- 0.2mm this should be better than "overprinting" the whole pad/via. However, even a 0.1mm "gap" setting fragments small SMD outlines too much to be of any use.
Scazon Posted - 25 Jul 2017 : 14:28:17
With my combination of gap and line widths, almost all the SMD component outlines are deleted. It also breaks the outline at every via. This all makes it look a bit raggy. I can't see that filling vias is a problem, especially if the resist already covers them.