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 Why does CPO line width affect fill?

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T O P I C    R E V I E W
ricobasso Posted - 17 Jan 2015 : 10:28:44
V18 on Windows 7

Got a weird one today. By default the line width on a new copper pour outline(CPO) was 0. Before I cottoned on and changed it to 5 thou, I was getting copper poured all over some tracks and some ICs; straight over the top - no clearance at all -obliterated.

When I noticed that older CPOs were 5 thou line width and didnt have this problem I changed the line width and everything was hunky-dory.

Why is this?
2   L A T E S T    R E P L I E S    (Newest First)
ricobasso Posted - 17 Jan 2015 : 16:01:52
If so, then why is 0 width allowed?
edrees Posted - 17 Jan 2015 : 14:23:06
Perhaps a divide by 0 error when EPC calculates the pours?